1. Field of the Invention
The invention relates to a threshold modulation MOS type solid-state imaging device for use in video cameras, electronic cameras, image input cameras, scanners, and facsimiles, and to a method of detecting optical signals using such solid-state imaging device.
2. Description of the Prior Art
Semiconductor image sensors have been widely used in most image input devices because they can be mass produced using advanced fine patterning techniques. In particular, charge coupled devices (hereinafter referred to as CCDs) are used in various kinds of imaging apparatuses such as video cameras and facsimiles since they have high photo-sensitivity and low noise levels.
However, it is known that CCDs have the drawbacks, such that
(1) they require a large power consumption and an high operating voltage;
(2) they require a rather complicated manufacturing process and are costly as compared with CMOS type devices; and
(3) unlike CMOS devices, they cannot easily incorporate therein a complex peripheral circuit therefor.
On account of these impediments of CCDs to be solved, and because of a recent spread of a need for solid-state imaging devices in the marketplace, MOS type solid-state imaging devices have gained a great deal of attention. In addition, recent advancement of sub-micron CMOS technologies have proved feasibility of the fabrication of sub-micron imaging devices.
It should be noted, however, that conventional MOS type image sensors are inferior to CCD image sensors in performance. For example, MOS type image sensors suffer from random noise and fixed pattern noise. Thus, these principal problems must be overcome in order for MOS type image sensors to be useful.
On the other hand, micro-lens technology has enabled to scale down a photo-sensitive area. Several fine fabrication technologies (micro-technologies) have enabled to construct an integrated transistor amplifier involving two or three transistors for each pixel to result in enhancing the sensitivity of a MOS device. Thus, by the use of such an integrated circuit technology, it is now possible to reduce thermal noise (kTC noise) generating in X or Y MOS switches and fixed pattern noise due to structural non-uniformity of the device elements.
Therefore, a type of active CMOS image sensors, which are equipped with a transistor amplifier fabricated in each pixel of photo-detection portion using a micro-technology, has attracted much attention.
Active CMOS image sensors require no special technology. That is, they enable to easily integrate by ordinary CMOS technology peripheral CMOS circuits and the light sensing element on the single chip, so that they can be manufactured at low cost. In addition, they have advantages that they operate at a low operating voltage and consumes less power.
Thus, active CMOS image sensors are anticipated in near future to play an important role in one-chip cameras equipped with a sophisticated signal processing circuit.
Developments of prior art active CMOS image sensor are discussed in the following references.
(1) Japanese Patent Early Publications Nos. 60-140752, 60-206063, and 6-120473 disclose charge modulation devices (CMDs). A CMD uses a photo-sensitive area converter, which has CCD-like features. The gate electrode of the MOS transistor has a photo-gate electrode structure to improve its fill factor which is a ratio of a light transmitting area to a total area consisting of the light transmitting area and a light shielding area. This device is adapted to control a current passing through the MOS transistor by storing photo-generated charges in a surface of a Si layer below the photo-gate electrode of the MOS transistor.
(2) Japanese Patent Early Publication No. 64-149959 discloses a bulk charge modulated device (BCMD) as shown in FIG. 1. In this device also, in order to improve the fill factor, the gate electrode 7 of the MOS transistor has a photo-gate electrode structure and incorporates a layer (hereinafter referred to as a charge storing layer) for storing photo-generated charges. The charge storing layer is formed in a p-type well layer 3 on an n-type layer 2 and below the photo-gate electrode 7 as shown in FIG. 1A. It is noted that in this example the charge storing layer is formed in the p-type well layer 3 below the channel region 9 so as to suppress trapping of the photo-generated charges to surface trap levels in an interface portion between the n-type layer 9 and a gate oxide film 6 in contact with the layer 9. As a result, the noise caused by the photo-generated charges trapped in the surface trap levels may be suppressed. The MOS transistor shown in FIG. 1A also includes a p+-type substrate 1 on which the n-type layer 2 is formed, a source diffusion region 4 and a drain diffusion region 5 which are formed in the p-type well layer 3 at the both sides of the gate electrode 7, and a constant-current source 8.
(3) Japanese Patent Early Publication, No. 2-304973 disclosed a threshold voltage modulation type solid-state imaging device which has a ring-shaped gate electrode structure, in which a source diffusion region is formed at the center part surrounded by the ring-shaped gate electrode, and a drain diffusion region is formed so as to surround the source diffusion region and the ring-shaped gate electrode. The drain diffusion region is also extended to the light-detection portion and it serves as a heavily doped buried layer for a buried photo-diode. This example is characterized in that a photo-sensing device is provided outside the transistor and that a potentially minimum region is provided for signal charges, which lies within a well region below the channel region and extends along the entire length of the channel region, but occupies only a part of the entire channel width.
In this solid-state imaging device, the photo-generated charges, that is, electron-hole pairs occur in the buried photo-diode by illuminating it with light, and the charges of one-type of these pairs are stored in the photo-diode and results in a substrate bias or a change in potential of the substrate. The bias is used in controlling the threshold voltage of the MOS transistor. This imaging device is useful especially when the intensity of light is weak wherein only a small amount of charges are generated by light. The photo-generated charges are collected at the potentially minimum region to suppress the non-uniformity in sensitivity of the imaging device and to suppress associated fixed pattern noise.
However, a problem of random noise still remains in CMD type solid-state imaging devices. The random noise is caused by the trapping or scattering of the photo-generated charges in the surface region of the semiconductor, which cannot be removed completely by the above mentioned modifications, since a photoelectric conversion is done in the CMD solid-state imaging device using charges near the surface of the semiconductor.
The BCMD type solid-state imaging device as shown in FIG. 1A is used in a source follower connection. In this case, since the charge storing layer 3 lies in the entire channel region underlying the photo-gate electrode 7, it is difficult to drive the transistor under a sufficiently saturated condition. Consequently, the transistor operates in a triode-region current-voltage characteristic shown in FIG. 1B, and thus the BCMD imaging device poses a problem that the photo-generated charges cannot be converted linearly to voltage by the source follower connection to the MOS transistor.
It is noted that, since the carriers in the charge storing layer 3 are distributed throughout the channel region under the photo-gate electrode 7 and since the channel region, as a whole, contributes to a modulation of a current through it, the potential variation is not a linear function of photo-generated charges. Besides, since the resultant capacitance based on the gate oxide film above the charge storing layer 3 is relatively large, so that its conversion efficiency is rather low.
Further, both of the CMD type and the BCMD type solid-state imaging devices each having a photo-gate structure suffer from degradation of spectral sensitivity to light caused by multiple interference of incident light, which is pertinent to a photo-sensing device having a MOS structure.
The photo-gate electrode structure presents a further problem that it needs a special, complex process in forming a thin transparent photo-gate electrode.
In a solid-state imaging device having a region of minimum potential formed within a well region and extending partially along the width of the channel region and along the entire length of the channel region, the transistor assumes the triode-like current-voltage characteristic, which is not adequate for a linear charge-voltage conversion of the photo-generated charges by a source follower connection to the MOS transistor.
It is an object of the invention to provide a solid-state imaging device which has little noise caused by the trapping and scattering of photo-generated carriers in the semiconductor surface of the device.
It is another object of the invention to provide a solid-state imaging device with an improved spectral sensitivity to light.
It is still another object of the invention to provide a solid-state imaging device having a linear charge-voltage conversion characteristic for a photo-generated charge.
It is a further object of the invention to provide a solid-state imaging device having therein a photo-sensing device that can be fabricated by an ordinary CMOS process.
It is a still further object of the invention to provide a light detection method using such a solid-state imaging device as described above.
In a constitution of the present invention, a solid-state imaging device equipped with a plurality of unit pixels each including a photo-diode and an insulated gate field effect transistor, said photo-diode comprising a substrate having a first conductivity type, a semiconductor layer formed on said substrate and having a second conductivity type, a well region formed on said semiconductor layer and having the first conductivity type, an impurity region formed on the surface of said well region and having the second conductivity type, and said insulated gate field effect transistor comprises a drain region formed on the surface of said well region, extending to said impurity region, and having the second conductivity type, a source region formed on the surface of said well region, spaced apart from said drain region, and having the second conductivity type, a gate electrode formed on a gate insulation layer which is formed on said well region and between said drain region and said source region; and a heavily doped buried layer formed in said well region near said source region below said gate electrode, said heavily doped buried layer doped with an impurity of the first conductivity type heavier in concentration than said well region.
The heavily doped region as the carrier pocket is separated from the drain region for injected carriers to contribute the efficient threshold voltage of MOS transistor modulation.
When a ring shaped gate electrode is used for example, the source diffusion region is formed in the surface layer of a well region in a central region surrounded by the ring-shaped gate electrode, and the drain diffusion region is formed in the surface layer of the well region surrounding the ring-shaped gate electrode, and the heavily doped buried layer is formed in the well region below the gate electrode so as to surround the source diffusion region.
In this arrangement, the heavily doped buried layer has a lowest potential for holes throughout the well region if the heavily doped buried layer of p-type is formed in a p-type well region. On the other hand, the heavily doped buried layer has a highest potential for electrons throughout the well region if the heavily doped buried layer of n-type is formed in an n-type well region.
The impurity diffusion region of the photo-diode is combining with the drain diffusion region of the field effect transistor (FET), so that the photo-diode and the FET may share the same well region. The heavily doped buried layer is formed near the source diffusion region.
Since the heavily doped buried layer is disposed near the source diffusion region, charges generated in the well region of the photo-diode will easily collect in the heavily doped buried layer.
In other words, when the well region is p-type and an n-channel MOS transistor is used as an optical signal detection transistor, then holes are used, and the source diffusion region is set at a lower electric potential than the drain diffusion region. Alternatively, when the well region is n-type and the signal detection transistor is a p-channel MOS transistor, then photo-generated charges are electrons, and the source diffusion region is set to a higher potential than the drain diffusion region. Thus, if the drain diffusion region is supplied with a positive or negative operating voltage VDD, and the gate electrode is supplied with a lower voltage, then an electric field is generated in the well layer so as to accelerate either holes or electrons of the photo-generated charges to move from the drain diffusion region of the FET, i.e. the impurity diffusion region of the photo-diode, to the source diffusion region.
An initialization of the imaging device expels out of the semiconductor layer and substrate the photo-generated charges that remain after a read operation, and holes or electrons that remain in the acceptors or the donors in the well region and the other semiconductor layer to neutralize the acceptors or the donors. The new charges are photo-generated in the well region of the photo-diode. The voltage subsequently applied to the electrode and regions as described above will cause the new photo-generated charges to be transferred to the heavily doped buried layer and stored therein. Once collected in the heavily doped buried layer, the charges cannot easily get out or diffuse out of the heavily doped buried layer because of the lower potential it has there. Thus, the photo-generated charges are effectively stored in the heavily doped buried layer.
The photo-generated charges stored in the heavily doped buried layer can be removed therefrom by applying a voltage which is higher than the operating voltage to the gate electrode, the drain diffusion region, and the source diffusion region to thereby enhance the electric field through the well region.
As the photo-generated charges are stored in the heavily doped buried layer, the Fermi level in the heavily doped buried layer is changed and the space charge therein is decreased corresponding to the amount of the stored charges, so that the threshold voltage of the transistor is lowered. At the same time, as the stored charges in the heavily doped buried layer increases, carriers having the opposite conduction type relative to the stored charges in the heavily doped buried layer is generated in the channel region in accordance with the law of conservation of charges, thereby partially creating a inversion region just over the heavily doped buried layer, so that channel conductance is increased therein.
Since the photo-generated charges are not stored in any region other than the heavily doped buried layer due to a high potential outside the heavily doped buried layer, no further inversion region will be formed in a surface layer of the well region below the gate electrode other than therein right on the heavily doped buried layer, but a strong electric field is generated therein (this region will be referred to as strong-electric field region).
Because of the inversion region and the strong-electric field region formed in the same channel region, the transistor becomes operable under a saturated condition. Thus, if a constant current is supplied to the source of the transistor used in a source follower connection and if an appropriated gate voltage is applied to the gate, the transistor follows the change in the threshold voltage of the transistor and changes the potential in the source diffusion region accordingly.
In addition, since the transistor may operate under a saturated condition, the current passing through it depends only on the voltage difference between the gate electrode and the source diffusion region. Accordingly, the change of the source potential depends only on the amount of the stored charges of the photo-generated charges.
By outputting this source potential as a video signal, an advantageous linear photoelectric charge-voltage conversion may be obtained.
Since the amount of the charges stored in the heavily doped buried layer is balanced by the charges induced in the inversion region, the amount of the charges stored in the heavily doped buried layer is the same as that of the charges supplied to the gate insulating film (acting as a capacitor). Hence, the output of the transistor corresponds to a change in the threshold voltage.
The injected carriers are shared by the distributed capacitance to each transistor nodes, are also responded to the other capacitance components such as the capacitance to drain and substrate causing the loss of threshold modulation sensitivity. Therefore, the highly doped region should be located near the gate electrode and separated from the drain edge to increase the modulation sensitivity.
The charge-storage of the photo-generated charges to the capacitor of the gate insulating film is limited by the capacitance of the gate insulating film just over the heavily doped buried layer acting as the carrier pocket. Therefore, the detection sensitivity of the image sensor is determined from the thickness of the gate insulating film, the area and the depth of the heavily doped buried layer. Moreover, the capacitance can be regarded as constant, so that the image sensor enables a sensitive detection of light based on an excellent linear charge-voltage transfer characteristics.
In general, if a surface of the semiconductor layer is depleted, the depleted region acts as a barrier for holes.
If the transistor has an ordinary photo-gate electrode, the surface of the semiconductor layer filled with the photo-generated charges would reach an electrostatic equilibrium. Then the sensor would suffer from a serious problem such as a generation of a dark current due to a thermal excitation and a potential modulation due to an accumulation of parasitic holes.
On the other hand, the channel region of the transistor of the invention is adapted to hold a depletion condition therein after initialization of the transistor for sweeping remaining charges. In addition, since the transistor is shielded from light, no appreciable carriers will be formed therein. Should certain carriers be trapped on the surface of the semiconductor layer in the transistor, they could not override the potential barrier to become a dark current or noise on the surface.
Briefly stated, the present invention causes the photo-generated charges which control a current through a detection transistor to store in an isolated region in the well region underlying a channel region so that the charges do not interact with a surface layer of a MOS transistor.
By collecting the photo-generated charges in the neighborhood of the source diffusion region, it is possible to control the threshold voltage of the transistor, thereby enabling realization of an ideal threshold voltage modulated CMOS image sensor having a linear response and a high detection sensitivity without generating appreciable noise.